Post by kellyyu on Jan 17, 2024 4:38:45 GMT -5
Traditional micromachining technology is mainly divided into surface micromachining technology and bulk silicon micromachining technology. Surface micromechanical process uses deposited film to fabricate microstructures, which is compatible with integrated circuit process and can realize monolithic integration of mechanical sensitive unit and processing circuit. The bulk silicon micromechanical process directly processes the matrix material to produce the quasi-three-dimensional structure.
With the development of micromanufacturing technology, many micromanufacturing processes integrate some processes of surface micromachinery and bulk silicon micromachinery, thus combining the advantages of both. More typical is the University of Michigan reported the high aspect ratio polycrystalline silicon and single silicon combination (HARPSS) process, which uses bulk silicon micromachining methods to obtain large movable mass blocks, and uses a technology similar to the sacrificial layer corrosion in surface micromachinery to obtain the fixed electrode and capacitor spacing. It combines the advantages of surface micromachining and bulk silicon micromachining.
At present, the mainstream process flow of high-performance MEMS gyro also has the advantages of surface micromechanical sacrificial layer corrosion process and bulk silicon micromechanical deep reactive ion etching process, and the more typical process flow is based on SOI wafer: the process flow is based on wafer bonding. Based on the process flow of SOI wafer, the gyroscope produced by this method has a thicker movable mass block, which can obtain a large movable mass and a small Brownian thermal noise base, so as to improve the performance of the gyroscope.
The low-cost SOI process developed by HG-IMIT is relatively typical, and the process flow is shown in Figure 8. (a) The AI electrode is machined on the structural layer on the SOI substrate. (b) Using PECVD deposited oxide layer, photoetching oxide layer, using oxide layer and photoresist as mask, deep reactive ion etching, and using anisotropic reactive ion etching process to carve the embedded oxide layer between the structural layer and the substrate. (c) PECVD deposition of the oxide layer is used again to protect the deeply etched trench side wall, and anisotropic reactive ion etching is used to carve the oxide layer between the structural layer and the substrate silicon. (d) Release of structures by isotropic silicon etching: In order to avoid electronic defects and reduce stress on the silicon and oxide layers, all oxide layers are removed by isotropic plasma etching processes.
The rest of part has shown in the reference
Contact me:
Email: info@ericcointernational.com
Whatsapp: 139 9288 4879
With the development of micromanufacturing technology, many micromanufacturing processes integrate some processes of surface micromachinery and bulk silicon micromachinery, thus combining the advantages of both. More typical is the University of Michigan reported the high aspect ratio polycrystalline silicon and single silicon combination (HARPSS) process, which uses bulk silicon micromachining methods to obtain large movable mass blocks, and uses a technology similar to the sacrificial layer corrosion in surface micromachinery to obtain the fixed electrode and capacitor spacing. It combines the advantages of surface micromachining and bulk silicon micromachining.
At present, the mainstream process flow of high-performance MEMS gyro also has the advantages of surface micromechanical sacrificial layer corrosion process and bulk silicon micromechanical deep reactive ion etching process, and the more typical process flow is based on SOI wafer: the process flow is based on wafer bonding. Based on the process flow of SOI wafer, the gyroscope produced by this method has a thicker movable mass block, which can obtain a large movable mass and a small Brownian thermal noise base, so as to improve the performance of the gyroscope.
The low-cost SOI process developed by HG-IMIT is relatively typical, and the process flow is shown in Figure 8. (a) The AI electrode is machined on the structural layer on the SOI substrate. (b) Using PECVD deposited oxide layer, photoetching oxide layer, using oxide layer and photoresist as mask, deep reactive ion etching, and using anisotropic reactive ion etching process to carve the embedded oxide layer between the structural layer and the substrate. (c) PECVD deposition of the oxide layer is used again to protect the deeply etched trench side wall, and anisotropic reactive ion etching is used to carve the oxide layer between the structural layer and the substrate silicon. (d) Release of structures by isotropic silicon etching: In order to avoid electronic defects and reduce stress on the silicon and oxide layers, all oxide layers are removed by isotropic plasma etching processes.
The rest of part has shown in the reference
Contact me:
Email: info@ericcointernational.com
Whatsapp: 139 9288 4879